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Updated date
Fixed fanouts merging test
!581
· created
Jan 09, 2025
by
Ершов Михаил Алексеевич
Model
Merged
updated
Jan 09, 2025
Introduce PowerArcs to track related input pins
!579
· created
Jan 09, 2025
by
Черток Никита Дмитриевич
TechMapper
Merged
updated
Jan 09, 2025
Turned Slew into vector
!569
· created
Dec 24, 2024
by
Штренев Владислав
TechMapper
Merged
updated
Dec 27, 2024
Fix: dbgen logs.
!578
· created
Dec 27, 2024
by
Вершков Максим Дмитриевич
Merged
updated
Dec 27, 2024
MatrixGeneratorTest fixed
!576
· created
Dec 26, 2024
by
Усачев Даниил Сергеевич
Merged
updated
Dec 26, 2024
dbgen log.
!570
· created
Dec 24, 2024
by
Вершков Максим Дмитриевич
Merged
2
updated
Dec 26, 2024
Added mergeCells(entryID1, entryID2) to reducer
!575
· created
Dec 26, 2024
by
Усачев Даниил Сергеевич
Merged
updated
Dec 26, 2024
Prev fix
!574
· created
Dec 25, 2024
by
Усачев Даниил Сергеевич
Merged
updated
Dec 25, 2024
Techmap quiet option
!573
· created
Dec 25, 2024
by
Черток Никита Дмитриевич
TechMapper
Merged
updated
Dec 25, 2024
Functional reduction
!554
· created
Dec 10, 2024
by
Усачев Даниил Сергеевич
Merged
updated
Dec 25, 2024
Techmap integration
!572
· created
Dec 25, 2024
by
Черток Никита Дмитриевич
TechMapper
Merged
updated
Dec 25, 2024
Frequent NPN6 mincodes.
!571
· created
Dec 24, 2024
by
Вершков Максим Дмитриевич
Merged
updated
Dec 25, 2024
Move design to context
!565
· created
Dec 23, 2024
by
Черток Никита Дмитриевич
Merged
updated
Dec 24, 2024
Add warmup-cache option
!564
· created
Dec 23, 2024
by
Черток Никита Дмитриевич
Merged
updated
Dec 24, 2024
Fix in verilog printer in module instantiation.
!566
· created
Dec 23, 2024
by
Григоров Иван Александрович
Merged
updated
Dec 24, 2024
dbgen: schemes generation optimization.
!567
· created
Dec 23, 2024
by
Вершков Максим Дмитриевич
Merged
updated
Dec 24, 2024
Graphml printer
!562
· created
Dec 19, 2024
by
Черток Никита Дмитриевич
Merged
6
updated
Dec 20, 2024
ADD: Testa zero-cost replacemet
!563
· created
Dec 19, 2024
by
Романов Никита Сергеевич
Merged
updated
Dec 20, 2024
Removing extra asserts on max arity argument in MIG synthesizers.
!561
· created
Dec 18, 2024
by
Вершков Максим Дмитриевич
LogOptimizer
Merged
updated
Dec 19, 2024
Base cut preestimation in techmapper
!508
· created
Nov 04, 2024
by
Ягжов Алексей Александрович
TechMapper
Merged
2
updated
Dec 18, 2024
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