Merge requests · mvg / Utopia EDA · GitLab

fix in Subnet::getPathLength (solution for issue #88)

!122 · created Dec 19, 2023 by Ягжов Алексей Александрович
Model
updated Jan 17, 2024
'FIRRTL' to 'model2' translator added (along with the tests).

!121 · created Dec 18, 2023 by Григоров Иван Александрович
updated Jan 25, 2024
A proposal of solving issue with XNOR in addCellTree().

!120 · created Dec 18, 2023 by Вершков Максим Дмитриевич
LogOptimizer Model
- Merged
- 1
updated Jan 17, 2024
bug in subnet_truth_table.h

!119 · created Dec 17, 2023 by Ягжов Алексей Александрович
Model
updated Jan 17, 2024
Draft: Added max cut finding mode for CutExtractor.

!118 · created Dec 11, 2023 by Ершов Михаил Алексеевич
LogOptimizer
- Closed
updated Dec 20, 2023
maxArity in bi-decomposition and Minato-Morreale

!117 · created Dec 09, 2023 by Ягжов Алексей Александрович
LogOptimizer
updated Jan 17, 2024
Simulator

!116 · created Dec 09, 2023 by Ягжов Алексей Александрович
Simulator
updated Jan 17, 2024
Firrtl

!115 · created Dec 04, 2023 by Ушаков Александр Николаевич
- Merged
- 25
updated Dec 27, 2023
Draft: Reed muller max arity

!114 · created Dec 02, 2023 by Знатнов Егор Павлович
LogOptimizer
- Closed
- 4
updated Jan 13, 2024
Bugfix in entries iterating.

!113 · created Dec 01, 2023 by Ершов Михаил Алексеевич
LogOptimizer
updated Jan 11, 2024
Draft: Memory assertion

!112 · created Nov 30, 2023 by Ягжов Алексей Александрович
Synthesizer
- Closed
updated Jan 15, 2024
Revert "subnet_test.cpp: comment tests out till !106 fix"

!111 · created Nov 30, 2023 by Sergey Smolov
Synthesizer
updated Jan 04, 2024
maxArity parameter for synthesizers.

!109 · created Nov 29, 2023 by Вершков Максим Дмитриевич
LogOptimizer
- Merged
- 5
updated Dec 04, 2023
Resynthesis contest

!108 · created Nov 27, 2023 by Вершков Максим Дмитриевич
LogOptimizer
updated Dec 01, 2023
Draft: model2/list.h assertion

!107 · created Nov 23, 2023 by Ягжов Алексей Александрович
LogOptimizer
- Closed
updated Dec 24, 2023
Draft: memory.h assertion

!106 · created Nov 23, 2023 by Ягжов Алексей Александрович
- Closed
updated Jan 04, 2024
New constructor for LayerGenerator.

!104 · created Nov 21, 2023 by Ершов Михаил Алексеевич
Synthesizer
- Merged
- 9
updated Dec 01, 2023
FIRRTL to Verilog translator

!103 · created Nov 20, 2023 by Ушаков Александр Николаевич
- Closed
updated Dec 04, 2023
Function addCellTree().

!102 · created Nov 20, 2023 by Вершков Максим Дмитриевич
Synthesizer
- Merged
- 6
updated Nov 27, 2023
RndChecker2

!101 · created Nov 19, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
- 6
updated Jan 17, 2024

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