Merge requests · mvg / Utopia EDA · GitLab

Yml script for auto building

!28 · created Jul 20, 2023 by Грицун Тимофей Юрьевич
CI/CD & Testing
- Merged
- 3
updated Jan 17, 2024
Find cut parameter

!26 · created Jul 19, 2023 by Щербакова Елизавета Александровна
LogOptimizer
- Merged
- 10
updated Jan 17, 2024
Walker logic is separated. Cone find methods moved to util.

!25 · created Jul 18, 2023 by Щербакова Елизавета Александровна
LogOptimizer
- Merged
updated Jan 17, 2024
Verilog lec tests version №2

!24 · created Jul 17, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
- 32
updated Jan 17, 2024
Hints creation function

!23 · created Jul 16, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
updated Jan 17, 2024
Draft: Bi decomposition

!22 · created Jul 12, 2023 by Ягжов Алексей Александрович
LogOptimizer
- Closed
- 40
updated Sep 25, 2023
Mitering at default checker

!21 · created Jul 11, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
- 12
updated Jan 17, 2024
getter methods for simulator & minor bug fix

!18 · created Jul 07, 2023 by Кашинцев Илья Константинович
Simulator
- Merged
- 5
updated Jan 17, 2024
Unitized Table for Akers algorithm

!17 · created Jul 06, 2023 by Вершков Максим Дмитриевич
LogOptimizer
- Merged
- 81
updated Jan 17, 2024
More bases

!16 · created Jul 03, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
updated Jan 17, 2024
GNet->BDD Converter add MAJ3

!15 · created Jul 01, 2023 by Рамалданов Рустамхан Ражудинович
Model
- Merged
updated Jan 17, 2024
Fixed bug: GateVerilogParser doesn't create OUT gates.

!14 · created Jun 30, 2023 by Щербакова Елизавета Александровна
Translator
- Merged
- 26
updated Jan 17, 2024
Rnd checker fixed

!13 · created Jun 29, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
- 5
updated Jan 17, 2024
Tech map

!12 · created Jun 27, 2023 by Гаряев Даниил Ренатович
TechMapper
- Merged
- 48
updated Jan 17, 2024
Ril LEC tests

!10 · created Jun 23, 2023 by Кашинцев Илья Константинович
LogVerifier
- Merged
- 28
updated Jan 17, 2024
ParserV outs tests and nOuts method

!9 · created Jun 22, 2023 by Кашинцев Илья Константинович
Model
- Merged
- 3
updated Jan 17, 2024
getNet moved to gate_verilog_parser

!6 · created Jun 20, 2023 by Кашинцев Илья Константинович
Translator
- Merged
- 4
updated Jan 17, 2024
gnet: fix incorrect subnet index in addNet()

!5 · created Jun 20, 2023 by Кашинцев Илья Константинович
Model
- Merged
- 1
updated Jan 17, 2024
GraphML printer and test suite

!4 · created Jun 19, 2023 by Мешочков Данила Михайлович
Model
- Merged
- 24
updated Jan 17, 2024
Fix issue "rwdatabase.cpp: warnings"

!2 · created Jun 14, 2023 by Рамалданов Рустамхан Ражудинович
LogOptimizer
- Merged
updated Jan 17, 2024

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